1. Field of the Invention
The present invention relates to a wide range operational amplifier using transistors.
2. Related Art
An operational amplifier circuit (OP amp) as shown in FIG. 1 which is called a folded cascaded circuit has been known as a wide range operational amplifier. Such folded cascaded circuit is described in "Design Techniques for Cascaded CMOS OP Amps with improved PSPR and Common-mode input range", for example.
The OP amp shown in FIG. 1 includes first and second power supply terminals 1, 2; input terminals 4, 5; output terminals 6, 7; first, second and third current source circuits I1, I2, and I3 connected to the first power supply terminal 1; a transistor differential pair 3, a common source terminal of which is connected to the first power supply terminal 1 through the first current source circuit I1; a first transistor M1, a gate B1 of which is biased to a constant voltage, a source of which is connected to a first output 8 of the transistor differential pair 3, and a drain of which is connected to the first output terminal 6; a second transistor M2, a gate B2 of which is biased to a constant voltage, a source of which is connected to a second output 9 of the transistor differential pair 3, and a drain of which is connected to the second output terminal 7; a fourth current source circuit I4 connected between the source of the first transistor M1 and the second power supply terminal 2; and a fifth current source circuit I5 connected between the source of the second transistor M2 and the second power supply terminal 2.
A signal input to an input terminal 4 of the operational amplifier is inverted by a differential input stage, amplified by the transistor M1, and is then output from the output terminal 6. Similarly, a signal input to an input terminal 5 of the transistor differential pair 3 is inverted by the differential input stage, amplified by the transistor M2, and is then output from the output terminal 7. Accordingly, this OP amp inputs a differential input signal, inverts and amplifies the same, and outputs a differential output signal.
An example of a frequency characteristic of gain and phase of such operational amplifier (hereinafter referred to as frequency characteristic) is shown in FIG. 2.
According to this circuit, the frequency characteristic is degraded due to the poles and the zero point caused by the load capacitance and the gate-grounded type transistors M1 and M2.
When the load capacitance connected to the output terminal becomes smaller, the frequency at unity gain (at 0 dB) (hereinafter referred to as unity gain frequency) becomes larger. The phase margin, however, becomes smaller. In the example shown in FIG. 2, as the load capacitance becomes smaller such as 10 pF, 5 pF, 1 pF, 0.5 pF, and 0.1 pF, the unity gain frequency is increased such as 7 MHz, 14 MHz, 45 MHz, 60 MHz, and 79 MHz. However, the phase margin becomes smaller such as 85 degrees, 79 degrees, 56 degrees, 46 degrees, and 34 degrees.
The phase margin is preferably at least 45 degrees and if possible 60 degrees to ensure that the OF amp will operate stably at the unity gain frequency. If the phase margin is smaller than 45 degrees, the OP amp cannot operate stably at the unity gain frequency.
For this reason, if the phase margin becomes smaller as described above, the operational amplifier cannot operate stably. For example, if the phase margin is 46 degrees or less, the OP amp is subject to oscillation. Accordingly, when the conventional operational amplifier is used in an application where the load capacitance is varied, its operation condition is constrained. Further, the stable operation cannot be guaranteed without an optimal design tailored to the load capacitance.